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74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs ?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 f ebruary 2008 74lcx126 low voltage quad buffer with 5v tolerant inputs and outputs features 5v tolerant inputs and outputs 2.3v?.6v v cc specifications provided 5.5ns t pd max. (v cc = 3.3v), 10? i cc max. power down high impedance inputs and outputs supports live insertion/withdrawal (1) ?4ma output drive (v cc = 3.0v) implements patented noise/emi reduction circuitry latch-up performance exceeds jedec 78 conditions esd performance: ? human body model > 2000v ? machine model > 100v leadless dqfn package note: 1. to ensure the high-impedance state during power up or down, oe should be tied to v cc through a pull-up resistor: the minimum value of the resistor is determined by the current-sourcing capability of the driver. general description the lcx126 contains four independent non-inverting buffers with 3-state outputs. each output is disabled when the associated output-enable (oe) input is low. the inputs tolerate voltages up to 7v allowing the inter- face of 5v systems to 3v systems. the 74lcx126 is fabricated with an advanced cmos technology to achieve high speed operation while main- taining cmos low power dissipation. ordering information note: 2. dqfn package available in tape and reel only. device also available in tape and reel. specify by appending suffix letter ??to the ordering number. all packages are lead free per jedec: j-std-020b standard. order number package number package description 74lcx126m m14a 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow 74lcx126sj m14d 14-lead small outline package (sop), eiaj type ii, 5.3mm wide 74lcx126bqx (2) mlp14a 14-terminal depopulated quad very-thin flat pack no leads (dqfn), jedec mo-241, 2.5 x 3.0mm 74lcx126mtc mtc14 14-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 2 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs connection diagrams pin assignments for soic, sop, and tssop (top view) pad assignments for dqfn (top through view) pin description logic symbol ieee/iec truth table h = high voltage level l = low voltage level z = high impedance x = immaterial pin names description a n inputs oe n output enable inputs o n outputs inputs output oe n a n o n hll hhh lxz
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 3 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. note: 3. i o absolute maximum rating must be observed. recommended operating conditions (4) the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. note: 4. unused inputs must be held high or low. they may not float. symbol parameter rating v cc supply voltage ?.5v to +7.0v v i dc input voltage ?.5v to +7.0v v o dc output voltage, output in 3-state ?.5v to +7.0v output in high or low state (3) ?.5v to v cc + 0.5v i ik dc input diode current, v i < gnd ?0ma i ok dc output diode current v o < gnd ?0ma v o > v cc +50ma i o dc output source/sink current ?0ma i cc dc supply current per supply pin ?00ma i gnd dc ground current per ground pin ?00ma t stg storage temperature ?5? to +150? symbol parameter min. max. units v cc supply voltage operating 2.0 3.6 v data retention 1.5 3.6 v i input voltage 0 5.5 v v o output voltage high or low state 0 v cc v 3-state 0 5.5 i oh / i ol output current v cc = 3.0v?.6v ?4 ma v cc = 2.7v?.0v ?2 v cc = 2.3v?.7v ? t a f ree-air operating temperature ?0 85 ? ? t / ? v input edge rate, v in = 0.8v?.0v, v cc = 3.0v 0 10 ns / v
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 4 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs dc electrical characteristics note: 5. outputs disabled or 3-state only. ac electrical characteristics note: 6. skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. the specification applies to any outputs switching in the same direction, either high-to-low (t oshl ) or low-to-high (t oslh ). symbol parameter v cc (v) conditions t a = ?0? to +85? units min. max. v ih high level input voltage 2.3?.7 1.7 v 2.7?.6 2.0 v il low level input voltage 2.3?.7 0.7 v 2.7?.6 0.8 v oh high level output voltage 2.3?.6 i oh = ?00? v cc ?0.2 v 2.3 i oh = ?ma 1.8 2.7 i oh = ?2ma 2.2 3.0 i oh = ?8ma 2.4 i oh = ?4ma 2.2 v ol low level output voltage 2.3?.6 i ol = 100? 0.2 v 2.3 i ol = 8ma 0.6 2.7 i ol = 12ma 0.4 3.0 i ol = 16ma 0.4 i ol = 24ma 0.55 i i input leakage current 2.3?.6 0 v i 5.5v ?.0 ? i oz 3-state output leakage 2.3?.6 0 v o 5.5v, v i = v ih or v il ?.0 ? i off po w er-off leakage current 0 v i or v o = 5.5v 10 ? i cc quiescent supply current 2.3?.6 v i = v cc or gnd 10 ? 3.6v v i , v o 5.5v (5) ?0 ? i cc increase in i cc per input 2.3?.6 v ih = v cc ?0.6v 500 ? symbol parameter t a = ?0? to +85?, r l = 500 ? units v cc = 3.3v ?0.3v, c l = 50 pf v cc = 2.7v, c l = 50 pf v cc = 2.5v ?0.2v, c l = 30 pf min. max. min. max. min. max. t phl , t plh propagation delay 1.5 5.5 1.5 6.0 1.5 6.6 ns t pzl , t pzh output enable time 1.5 6.0 1.5 7.0 1.5 7.8 ns t plz , t phz output disable time 1.5 5.5 1.5 6.5 1.5 6.6 ns t oshl , t oslh output to output skew (6) 1.0 ns
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 5 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs dynamic switching characteristics capacitance symbol parameter v cc (v) conditions t a = 25? unit t ypical v olp quiet output dynamic peak v ol 3.3 c l = 50pf, v ih = 3.3v, v il = 0v 0.8 v 2.5 c l = 30pf, v ih = 2.5v, v il = 0v 0.6 v olv quiet output dynamic valley v ol 3.3 c l = 50pf, v ih = 3.3v, v il = 0v ?.8 v 2.5 c l = 30pf, v ih = 2.5v, v il = 0v ?.6 symbol parameter conditions typical units c in input capacitance v cc = open, v i = 0v or v cc 7pf c out output capacitance v cc = 3.3v, v i = 0v or v cc 8pf c pd po w er dissipation capacitance v cc = 3.3v, v i = 0v or v cc , f = 10mhz 25 pf
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 6 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs ac loading and waveforms (generic for lcx family) figure 1. ac test circuit (c l includes probe and jig capacitance) waveform for inverting and non-inverting functions propagation delay. pulse width and t rec waveforms 3-state output low enable and disable times for logic 3-state output high enable and disable times for logic setup time, hold time and recovery time for logic t rise and t fall figure 2. waveforms (input characteristics; f = 1mhz, t r = t f = 3ns) t est switch t plh , t phl open t pzl , t plz 6v at v cc = 3.3 ?0.3v v cc x 2 at v cc = 2.5 ?0.2v t pzh , t phz gnd symbol v cc 3.3v ?0.3v 2.7v 2.5v ?0.2v v mi 1.5v 1.5v v cc / 2 v mo 1.5v 1.5v v cc / 2 v x v ol + 0.3v v ol + 0.3v v ol + 0.15v v y v oh ?0.3v v oh ?0.3v v oh ?0.15v
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 7 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs schematic diagram (generic for lcx family)
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 8 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs tape and reel specification t ape format for dqfn t ape dimensions inches (millimeters) reel dimensions inches (millimeters) pa ck ag e designator tape section number of cavities cavity status cover tape status bqx leader (start end) 125 (typ.) empty sealed carrier 3000 filled sealed tr ailer (hub end) 75 (typ.) empty sealed t ape size a b c d n w1 w2 12mm 13.0 (330.0) 0.059 (1.50) 0.512 (13.00) 0.795 (20.20) 2.165 (55.00) 0.488 (12.4) 0.724 (18.4)
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 9 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs physical dimensions figure 3. 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow pa c kage drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package speci?ations do not expand the terms of fairchilds worldwide terms and conditions, speci?ally the warranty therein, which covers fairchild products. always visit fairchild semiconductors online packaging area for the most recent package drawings: http://www .f airchildsemi.com/pac kaging/ land pattern recommendation notes: unless otherwise specified a) this package conforms to jedec ms-012, variation ab, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x145-14m e) drawing conforms to asme y14.5m-1994 f) drawing file name: m14arev13 pin one indicator 8 0 seating plane detail a scale: 20:1 gage plane 0.25 x45 1 0.10 c c b c a 7 m 14 b a 8 see detail a 5.60 0.65 1.70 1.27 8.75 8.50 7.62 6.00 4.00 3.80 (0.33) 1.27 0.51 0.35 1.75 max 1.50 1.25 0.25 0.10 0.25 0.19 (1.04) 0.90 0.50 0.36 r0.10 r0.10 0.50 0.25
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 10 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs physical dimensions (continued) figure 4. 14-lead small outline package (sop), eiaj type ii, 5.3mm wide pa c kage drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package speci?ations do not expand the terms of fairchilds worldwide terms and conditions, speci?ally the warranty therein, which covers fairchild products. always visit fairchild semiconductors online packaging area for the most recent package drawings: http://www .f airchildsemi.com/pac kaging/
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 11 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs physical dimensions (continued) figure 5. 14-terminal depopulated quad very-thin flat pack no leads (dqfn), jedec mo-241, 2.5 x 3.0mm pa c kage drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package speci?ations do not expand the terms of fairchilds worldwide terms and conditions, speci?ally the warranty therein, which covers fairchild products. always visit fairchild semiconductors online packaging area for the most recent package drawings: http://www .f airchildsemi.com/pac kaging/
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 12 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs physical dimensions (continued) figure 6. 14-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide pa c kage drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package speci?ations do not expand the terms of fairchilds worldwide terms and conditions, speci?ally the warranty therein, which covers fairchild products. always visit fairchild semiconductors online packaging area for the most recent package drawings: http://www .f airchildsemi.com/pac kaging/ c. dimensions are exclusive of burrs, mold flash, and tie bar extrusions f. drawing file name: mtc14rev6 r0.09 min 12.00 top & botto m 0.43 typ 1.00 d. dimensioning and tolerances per ansi y14.5m, 1982 r0.09min e. landpattern standard: sop65p640x110-14m 0.65 6.10 1.65 0.45 a. conforms to jedec registration mo-153, variation ab, ref note 6 b. dimensions are in millimeters
?000 fairchild semiconductor corporation www.fairchildsemi.com 74lcx126 rev. 1.5.0 13 trademarks th ef ollowing includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its global s ubsidiaries, and is not intended to be an exhaustive list of all such trademarks. acex build it now coreplus crossvolt ctl current transfer logic ecospark ezswit ch * fairchild fairchild semiconductor fact quiet series fact fast fastvcore flashwriter ? fps frfet global power resource sm green fps green fpse-series gto i-lo intellimax isopla nar m egabuck mi crocoupler microfet micropak mi llerdrive mo ti on-spm optologic optopl anar pdp-spm pow er220 poweredge power-spm po we rtrench pr ogrammable active droop qfet qs qt optoelectronics quiet series rapidconfigure smart start spm stealth s uperfet su persot -3 s upersot-6 s upersot-8 s upremos syncfet the power franchise tinyboost tinybuck tinylogic tinyopto tinypower tinypwm tinywire serdes uhc ultra f rfet unifet vcx *ezswi tch and flashwriter are trademarks of system general corporation, used under license by fairchild semiconductor. disc laimer fa i rchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. fairchild does not assume any liability arising out of the application or use of any pro duct or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these speci fications do not expand t he terms of fairchild? wo rl dw ide terms and conditions, specifically the warranty therein, which covers these products. life support policy fa i rchilds products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems wh ic h, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform wh en properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. pr oduct status definitions defi nition of terms da tasheet identification product status definition ad vance information formative or in design this datasheet contains the design specifications for product development. specifications may change in any manner without notice. pr eliminary first production this datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the right to ma ke c hanges at any time without notice to improve design. no identification needed full production this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice to improve the des i gn. obsolete not in production this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. rev. i33 74lcx126 ?low voltage quad buffer with 5v tolerant inputs and outputs

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